In digital circuits, in order to lower the power supply impedance of a digital IC (hereinafter, simply referred to as an “IC”) and to remove noise, a decoupling capacitor (hereinafter, simply referred to as a “capacitor”) is used on the periphery of a power supply terminal of the IC (for example, see Non-Patent Document 1). Normally, from the viewpoint of suppressing a voltage variation, it is desirable to have a lower power supply impedance, and it is thus desirable to have a lower impedance of the decoupling capacitor. Therefore, a capacitor having a sufficient electrostatic capacitance is used in accordance with a power supply impedance required by the IC. However, in a high-frequency range of several MHz or more, due to the influence of a minute equivalent series inductance (ESL (Equivalent Series Inductance)) of a capacitor (hereinafter, referred to as an “ESLcap”), impedance is not lowered only with the electrostatic capacitance. Thus, a capacitor having a small ESLcap is suitable for a high-frequency range.
In addition, in the high-frequency range, apart from the ESLcap, the inductance of a wiring that connects a power supply terminal of the IC with the capacitor (hereinafter, referred to as an “ESLpcb”) is also an issue (for example, see Non-Patent Document 2). Thus, normally, as illustrated in FIG. 13, with the boundary at several MHz (in FIG. 13, approximately 4.3 MHz), the power supply impedance tends to decrease as the frequency increases in accordance with the electrostatic capacitance of the capacitor in a lower-frequency side and the power supply impedance tends to increase as the frequency increases in a higher-frequency side. The above-described ESLcap and the ESLpcb are main factors which cause the increase of the impedance in the high-frequency side. Thus, in order to achieve a lower power supply impedance in the high-frequency range of several MHz or more, the ESLcap and the ESLpcb need to be decreased.
Non-Patent Document 1: Takahiro Yaguchi, “Purintohaisenban no pawainteguritei sekkei (Power Integrity Design of PCB),” Journal of Japan Institute of Electronics Packaging, vol. 12, No. 3, 2009.
Non-Patent Document 2: Tadashi Kubodera, “Kousoku dejitarukairo jissou nouhau (High-Speed Digital Circuit Mounting Know-How),” CQ Publishing Co., Ltd., 2002, Chapter 8.